Heat treatment technology to meet the challenges of new processes and new materials

Now is the final stage for device manufacturers to use SiO2 gate dielectrics. Grant said. Tony Dip, process manager of TEL’s heat treatment system, said: “Miniature technology has benefited from the reduction in voltage. However, some high-end products on the market now consume more than 100W and the chip area is less than 1 square inch (maybe close to 0.52 square inches or even smaller ). I don’t know if anyone cares about other problems caused by scaling, or as long as the product has a suitable operating speed and drive current. On the one hand, you have to get a satisfactory drive current, and on the other hand, you need to reduce the leakage current– How can you strike a balance between the two? Integration is one method, and changing materials is another. Chip manufacturers will choose the simpler one between the two.”

There have been changes in some new materials, such as high-k dielectrics and metal gates. It seems that they will be adopted at the same time, and some people even think that it is impossible to solve the problem without the cooperation of the two. “The problem is that this technology is not yet perfect and does not work properly.” Dip said, “The electrical response of high-k dielectrics on the silicon surface is very complicated, and the thinning of the dielectric will reduce the MOSFET channel mobility. Therefore, make the dielectric continue to thin or Using high-k dielectrics may not work. If you want to eliminate leakage current, you must increase power consumption and increase the drive current to an appropriate level. However, many of the advantages of high-k dielectrics cannot be brought into play.” High-k Dielectrics are still a distant dream. The possibility of high-k dielectric becoming a future technology is getting smaller and smaller. Some leading IDM companies are preparing to adopt novel strain layer technology. Now, all of their transistors use silicon nitride oxide as the gate dielectric, and they plan to further improve its performance through strained layer technology instead of high-k dielectrics.

Soave believes that the era of high-k dielectrics will definitely come. “We may not use high-k dielectrics until later, perhaps the first generation of 45nm process. Process progress has given “scaling” its own specific meaning. Looking back at past developments, you will find that your goal is not to reduce space and size. , But to improve performance through shrinking. Reducing space and size is just a method. The era of improving performance completely through size shrinking is basically over. Performance improvement must be achieved through other methods, such as more sophisticated design, SOI, strain layer, 3D devices, etc. But these methods still have their own problems. As for heat treatment, we will continue to improve the performance of existing traditional materials through the development and optimization of reactors, making them easier to control, wider in scope, and smaller in thermal budget , Lower cost, more suitable for integration with advanced devices.